February 18, 2004

 

Rochester Institute of Technology & Photronics Image 45-nanometer Lines & Spaces Using Immersion Lithography Technology

Research Results to be Presented at the SPIE Microlithography Conference

Brookfield, Connecticut,   February 18, 2004 -- Photronics, Inc. (NASDAQ: PLAB), today announced the research it has conducted jointly with the Rochester Institute of Technology (RIT), which produced the world’s first demonstration of 45-nanometer node wafer imaging technology utilizing a 193-nanometer excimer immersion lithography system, will be presented at the SPIE Microlithography Conference in California the week of February 23rd.  Leveraging a long standing technology development relationship, researchers in both organizations focused their efforts on generating a suitable phase shift mask that would enable the 45-nanometer patterns to be imaged at RIT based on definitions and parameters as described in the current edition of the International Technology Roadmap for Semiconductors.  In conjunction with the advanced mask technology provided by Photronics, RIT was able to successfully pattern 45-nanometer line-space pairs (or half pitch) using their prototype 193-nanometer immersion lithography system (see attached picture).  Semiconductor manufacturers and wafer foundries using 193-nanometer immersion technology have the potential to extend the lifecycle of their current processes down to the 45-nanometer process node and, thereby, maximize the value of the multi-million dollar investments made to support this enabling lithography strategy.

“The limitations of optical lithography has now become dependant on materials in a very different way.  The concept of immersion imaging that has been used in microscopy for 125 years is now being applied to the microlithography process,” said Professor Bruce Smith, Associate Dean of Engineering at Rochester Institute of Technology.  “The integration of advanced reticle technology into the complex imaging systems and processes required to support high yielding production of working devices below 90-nanometers using immersion technology is now more critical than ever.  The University is fortunate that its advanced process development capabilities have been so nicely complimented by the support and inputs received by the R&D team at Photronics.”

  Dr. Christopher Progler, PhD, Chief Scientist for Photronics commented, “Early assessment on 193-nanometer immersion lithography will help solidify the timing and strategy for advanced imaging on the wafer at both the 65-nanometer and 45-nanometer process nodes.  Collaboration with RIT to demonstrate the capability of immersion so early on in the development cycle provides a strategic competitive advantage in that Photronics is participating in the definition of critical mask requirements necessary to realize the fullest possible potential of this exciting technology.”

The results of the joint development research will be presented by Professor Bruce Smith, Associate Dean of Engineering at Rochester Institute of Technology in a session scheduled for Wednesday, February 25, 2004 at the SPIE Microlithography Conference in Santa Clara, California.

Photronics is a leading worldwide manufacturer of photomasks. Photomasks are high precision quartz plates that contain microscopic images of electronic circuits. A key element in the manufacture of semiconductors, photomasks are used to transfer circuit patterns onto semiconductor wafers during the fabrication of integrated circuits. They are produced in accordance with circuit designs provided by customers at strategically located manufacturing facilities in Asia, Europe, and North America. Additional information on the Company can be accessed at www.photronics.com.

“Safe Harbor" Statement under the Private Securities Litigation Reform Act of 1995: Certain statements in this release are considered "forward looking statements" within the meaning of the Private Securities Litigation Reform Act of 1995. All forward-looking statements involve risks and uncertainties. In particular, any statement contained in this release regarding the consummation and benefits of future acquisitions, expectations with respect to future sales, financial performance, operating efficiencies and product expansion, are subject to known and unknown risks, uncertainties and contingencies, many of which are beyond the control of the Company. These factors may cause actual results, performance or achievements to differ materially from anticipated results, performances or achievements. Factors that might affect such forward looking statements include, but are not limited to, overall economic and business conditions; the demand and receipt of orders for the Company's products; competitive factors in the industries and geographic markets in which the Company competes; changes in federal, state and foreign tax requirements (including tax rate changes, new tax laws and revised tax law interpretations); the Company's ability to place new equipment in service on a timely basis; interest rate fluctuations and other capital market conditions, including foreign currency rate fluctuations; economic and political conditions in international markets; the ability to obtain a new bank facility or other financings; the ability to achieve anticipated synergies and other cost savings in connection with acquisitions and productivity programs; the timing, impact and other uncertainties of future acquisitions and investments; the seasonal and cyclical nature of the semiconductor industry; the availability of capital; management changes; damage or destruction to our facilities by natural disasters, labor strikes, political unrest or terrorist activity; the ability to fully utilize its tools; the ability of the Company to receive desired yields, pricing, product mix, and market acceptance of its products; changes in technology; and other risks and uncertainties set forth in the Company’s SEC filings from time to time. Any forward-looking statements should be considered in light of these factors. The Company assumes no obligation to update the information in this release.

RIT Media Contacts: Michael Saffran (585)475-5697